Simulation Of Improved ATM Switch Using Dynamic Buffer Sharing and Multiprocessing

In an ATM network, the network performance depends on many parameters, including the architecture of the network and the performance of switching elements. The current paper discusses, the performance improvement by modifying the switch fabric and packet forwarding, using simulation concepts. A switch consists of some input buffers and an algorithm, to select the cells waiting in the queue, to be forwarded, to the output buffer. In this simulator, two processes are involved in picking and forwarding of the cells from input buffer, to the output buffer in ATM Switch. A substantial change in performance and improvement in throughput has been observed, using the proposed simulator, in comparison with the existing model [3] and the same has been depicted diagrammatically. Keyword: ATM, Network Simulation, Switch, performance, dynamic buffer sharing Notations: ATM Asynchronous Transfer Mode CBR Continuous Bit Rate VBR Variable Bit Rate RT/NRT Real Time/Non Real Time ABR Absolute Bit Rate UBR Unspecified Bit Rate